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CXL-SpecKV: A Disaggregated FPGA Speculative KV-Cache for Datacenter LLM Serving
System offloads key-value caches to remote FPGA memory using CXL interconnects, achieving 3.2× throughput gains and 2.8× memory cost reduction for datacenter LLM serving.
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Low-power gating system reduces data throughput in implantable BCI
NeuroGator gates brain signal processing in implantable devices, reducing power consumption and data throughput by 82% while maintaining classification accuracy for next-generation BCIs.
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Cost-effective FPGA platform records electrophysiological signals faithfully
FPGA-based modular platform for cost-effective electrophysiological signal acquisition with soft core processor, real-time conditioning, and performance validation against commercial systems.